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Article overview
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Transparent Live Code Offloading on FPGA | | Roberto Rigamonti
; Baptiste Delporte
; Anthony Convers
; Alberto Dassatti
; | | Date: |
1 Sep 2016 | | Abstract: | Even though it seems that FPGAs have finally made the transition from
research labs to the consumer devices’ market, programming them remains
challenging. Despite the improvements made by High-Level Synthesis (HLS), which
removed the language and paradigm barriers that prevented many computer
scientists from working with them, producing a new design typically requires at
least several hours, making data- and context-dependent adaptations virtually
impossible.
In this paper we present a new framework that off-loads, on-the-fly and
transparently to both the user and the developer, computationally-intensive
code fragments to FPGAs. While the performance should not surpass that of
hand-crafted HDL code, or even code produced by HLS, our results come with no
additional development costs and do not require producing and deploying a new
bit-stream to the FPGA each time a change is made. Moreover, since
optimizations are made at run-time, they may fit particular datasets or usage
scenarios, something which is rarely foreseeable at design or compile time.
Our proposal revolves around an overlay architecture that is pre-programmed
on the FPGA and dynamically reconfigured by our framework to execute code
fragments extracted from the Data Flow Graph (DFG) of computational intensive
routines. We validated our solution using standard benchmarks and proved we are
able to off-load to FPGAs without developer’s intervention. | | Source: | arXiv, 1609.0130 | | Services: | Forum | Review | PDF | Favorites | |
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